Electrical circuits can be constructed from two or more unit cells. Such unit cells can be for example diodes, transistors or other electronic components. These components can be configured on a common substrate. It is advantageous for many applications if several or even all of the unit cells on an electrical circuit can be contacted in common from outside. Thus for example a plurality of transistors can be connected together and can act like a transistor with a larger surface area. For this purpose, a source contact, a drain contact and a gate contact would then be contacted in common from outside. Correspondingly, a plurality of diodes can be connected in parallel and then act like a diode with a larger surface area. The contacts can hereby be configured as contact points on the common substrate.
According to the state of the art, contacts of various unit cells with the same function are connected to each other via buses and can be contacted from outside at these buses. For this purpose, the buses can have a bonding spot or be in connection with one such on which a bonding wire can be disposed.
According to the state of the art, these buses are disposed in a plane in which the contact points of the unit cells are disposed and are connected in this plane to all of the contact points of the same function. Bonding spots for external contacting are also disposed in the plane of the buses and of the contact points.
However, it is disadvantageous with such an arrangement that both the buses and possibly the bonding spots take up too much room on the substrate on which the unit cells and the electrical circuit are configured. This substrate surface is very expensive in particular in semiconductor technology. Furthermore, the spatial requirement on the substrate increases further with an increasing number of unit cells since the buses require a certain minimum width on the substrate in order to keep their internal resistance sufficiently low. The width of the buses therefore increases with the current to be conducted.